This invention relates generally to semiconductors and more particularly to methods for patterning electrical conductors used in such semiconductors.
As is known, the patterning of a metalization layer into electrical conductors typically involves etching portions of the metalization layer exposed by a patterned photoresist layer disposed on the surface of the metalization layer. One etching process uses reactive ion etching. One technique is described in U.S. Pat. No. 5,024,722, entitled Process for fabricating Conductors for Integrated Circuit Connection and the Like" issued Jun. 18, 1991. The patent describes at Column 2, beginning at line 2, that in effort to reduce undesirable lateral etching and undercutting of conductor sidewalls during plasma etching to form aluminum conductors, silicon tetrachloride, SiCl.sub.4, has ben added to the plasma reactants to thereby produce and deposit a silicon containing dielectric material on the side walls of the aluminum conductors being formed during the anisotropic plasma etching process. As described in the patent, this aluminum sidewall protective layer in turn produces a retardation of the undesirable horizontal or lateral etching and thereby reduces undercutting of the aluminum islands or conductors thus formed. The patent then states at column 2, beginning at line 57: "However, the use of this latter process employing silicon tetrachloride to form a sidewall organic layer for aluminum has not proven entirely satisfactory inasmuch as the deposition rate of the dielectric material formed on the aluminum sidewalls is too slow. Furthermore, the thin organic film produced by this SiCl.sub.4 process has not been significant in thickness and density to in fact prevent all of the above undesirable horizontal or lateral etching of the aluminum sidewalls during the conductor forming process."
The use of SiCl.sub.4 as an aluminum etch has also been reported in the following: an article entitled "Aluminum Sputter Etching Using SiCl.sub.4 ", by E. O. Degenkolb, published in the Journal of the Electrochemical Society, Vol. 129, 1982, p. 1150; U.S. Pat. No. 5,082,524 entitled, Addition of Silicon Tetrabromide to Halogenated Plasmas As a Technique for Minimizing Photoresist Deterioration During the Etching of Metal Layers", issued Jan. 21, 1992; U.S. Pat. No. 5,302,241, entitled "Post Etching Treatment of Semiconductor Devices", issued Apr. 12, 1994; and U.S. Pat. No. 5,236,854 entitled "Compound Semiconductor Device and Method for Fabrication Thereof", issued Aug. 17, 1993.